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Acknowledge
The acknowledge bit is a clocked 9th bit, shown in Figure 10 , which the recipient uses to handshake a receipt of each byte of
data. Thus each byte transferred effectively requires 9-bits. The master generates the 9 th clock tap, and the recipient pulls down
SDA during the acknowledge clock tap, such that the SDA line is stable low during the high period of the clock tap. When the
master is transmitting to MMA7660FC, it generates the acknowledge bit because it is the recipient. When the device is
transmitting to the master, the master generates the acknowledge bit because the master is the recipient.
START
CONDITION
SCL
1
2
TAP
CLOCK PULSE FOR
ACKNOWLEDGEMENT
8
9
SDA
BY TRANSMITTER
SDA
BY RECEIVER
S
Figure 10. Acknowledge
The Slave Address
MMA7660FC has a 7-bit long slave address, shown in Figure 11 . The bit following the 7-bit slave address (bit eight) is the
R/W bit, which is low for a write command and high for a read command. The device has a factory set I 2 C slave address which
is normally 1001100 (0x4C). Contact the factory to request a different I 2 C slave address, which is available in the range 0001000
to 1110111 (0x08 to 0xEF), by metal mask option.
SDA
1
0
0
1
1
0
0
R/W
ACK
MSB
SCL
Figure 11. Slave Address
The device monitors the bus continuously, waiting for a START condition followed by its slave address. When the device
recognizes its slave address, it acknowledges and is then ready for continued communication.
Message Format for Writing MMA7660FC
A write to MMA7660FC comprises the transmission of the device’s keyscan slave address with the R/W bit set to 0, followed
by at least one byte of information. The first byte of information is the register address of the first internal register that is to be
updated. The Master Write address is 1001 1000 (0x98). If a STOP condition is detected after just the register address is
received, then MMA7660FC takes no action. See Figure 12 . MMA7660FC clears its internal register address pointer to register
0x00 when a STOP condition is detected, so a single byte write has no net effect because the register address given in this first
and only byte is replaced by 0x00 at the STOP condition. The internal register address pointer is not , however, cleared on a
repeated start condition. Use a single byte write followed by a repeated start to read back data from a register.
Any bytes received after the register address are data bytes. The first data byte goes into the internal register of the device
selected by the register address. See Figure 12 .
Master
ST
Device Address [6:0]
W
Register Address [6:0]
Data [7:0]
SP
Slave
AK
AK
AK
Figure 12. Single Byte Write
MMA7660FC
Sensors
23
Freescale Semiconductor, Inc.
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